diff --git a/.gitignore b/.gitignore
index 26a4d23b..4fbbeb5c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -19,4 +19,5 @@ __pycache__/
 
 docs/_build
 docs/autoapi
+docs/chipflow-lib
 .cache
diff --git a/chipflow/cli.py b/chipflow/cli.py
index 6bcc0a3f..ef1b3b76 100644
--- a/chipflow/cli.py
+++ b/chipflow/cli.py
@@ -24,9 +24,9 @@ class UnexpectedError(ChipFlowError):
 
 
 DEFAULT_STEPS = {
-    "silicon": "chipflow.steps.silicon:SiliconStep",
-    "sim": "chipflow.steps.sim:SimStep",
-    "software": "chipflow.steps.software:SoftwareStep"
+    "silicon": "chipflow.platform.silicon_step:SiliconStep",
+    "sim": "chipflow.platform.sim_step:SimStep",
+    "software": "chipflow.platform.software_step:SoftwareStep"
 }
 
 
diff --git a/chipflow/common/__init__.py b/chipflow/common/__init__.py
new file mode 100644
index 00000000..6bbff3ea
--- /dev/null
+++ b/chipflow/common/__init__.py
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: BSD-2-Clause
+"""
+Common utilities for ChipFlow.
+"""
diff --git a/chipflow/steps/_json_compare.py b/chipflow/common/_json_compare.py
similarity index 100%
rename from chipflow/steps/_json_compare.py
rename to chipflow/common/_json_compare.py
diff --git a/chipflow/config.py b/chipflow/config.py
deleted file mode 100644
index a12af22a..00000000
--- a/chipflow/config.py
+++ /dev/null
@@ -1,20 +0,0 @@
-# SPDX-License-Identifier: BSD-2-Clause
-"""
-Backward compatibility shim for config parsing.
-
-This module re-exports config parsing utilities from the config module.
-New code should import directly from chipflow.config instead.
-"""
-
-# Re-export from config.parser module for backward compatibility
-from .config.parser import (  # noqa: F401
-    get_dir_models,
-    get_dir_software,
-    _parse_config_file,
-)
-
-__all__ = [
-    'get_dir_models',
-    'get_dir_software',
-    '_parse_config_file',
-]
diff --git a/chipflow/config_models.py b/chipflow/config_models.py
deleted file mode 100644
index 6717351b..00000000
--- a/chipflow/config_models.py
+++ /dev/null
@@ -1,34 +0,0 @@
-# SPDX-License-Identifier: BSD-2-Clause
-"""
-Backward compatibility shim for config models.
-
-This module re-exports configuration models from the config module.
-New code should import directly from chipflow.config instead.
-"""
-
-# Re-export from config module for backward compatibility
-from .config import (  # noqa: F401
-    Process,
-    Voltage,
-    VoltageRange,
-    SiliconConfig,
-    SimulationConfig,
-    CompilerConfig,
-    SoftwareConfig,
-    TestConfig,
-    ChipFlowConfig,
-    Config,
-)
-
-__all__ = [
-    'Process',
-    'Voltage',
-    'VoltageRange',
-    'SiliconConfig',
-    'SimulationConfig',
-    'CompilerConfig',
-    'SoftwareConfig',
-    'TestConfig',
-    'ChipFlowConfig',
-    'Config',
-]
diff --git a/chipflow/platforms/_packages.py b/chipflow/packages.py
similarity index 57%
rename from chipflow/platforms/_packages.py
rename to chipflow/packages.py
index 0fb093cd..961dd94a 100644
--- a/chipflow/platforms/_packages.py
+++ b/chipflow/packages.py
@@ -1,4 +1,11 @@
-from ..packaging import QuadPackageDef, BareDiePackageDef, GAPackageDef, Package, OpenframePackageDef
+# SPDX-License-Identifier: BSD-2-Clause
+"""
+Package definitions for ChipFlow platforms.
+
+This module contains package type definitions for supported IC packages.
+"""
+
+from .packaging import QuadPackageDef, BareDiePackageDef, GAPackageDef, Package, OpenframePackageDef
 
 # Add any new package types to both PACKAGE_DEFINITIONS and the PackageDef union
 PACKAGE_DEFINITIONS = {
diff --git a/chipflow/packaging/base.py b/chipflow/packaging/base.py
index 65d7c529..dfebcbb3 100644
--- a/chipflow/packaging/base.py
+++ b/chipflow/packaging/base.py
@@ -22,7 +22,7 @@
 from .allocation import _linear_allocate_components
 
 if TYPE_CHECKING:
-    from ..config_models import Config, Process
+    from ..config import Config, Process
 
 # Type variable for pin types (int for linear allocation, GAPin for grid arrays, etc.)
 PinType = TypeVar('PinType')
diff --git a/chipflow/packaging/lockfile.py b/chipflow/packaging/lockfile.py
index c5986500..38caf919 100644
--- a/chipflow/packaging/lockfile.py
+++ b/chipflow/packaging/lockfile.py
@@ -19,7 +19,7 @@
     from .openframe import OpenframePackageDef
 
 # Import Process directly for pydantic to work properly
-from ..config_models import Process
+from ..config import Process
 
 
 # Union of all package definition types
diff --git a/chipflow/packaging/openframe.py b/chipflow/packaging/openframe.py
index 8dae4fa0..d6eeab9f 100644
--- a/chipflow/packaging/openframe.py
+++ b/chipflow/packaging/openframe.py
@@ -10,7 +10,7 @@
 
 from .base import LinearAllocPackageDef
 from .pins import PowerPins, BringupPins
-from ..config_models import Voltage
+from ..config import Voltage
 
 
 class OFPin(NamedTuple):
diff --git a/chipflow/packaging/pins.py b/chipflow/packaging/pins.py
index 7562ffb1..34e33e3b 100644
--- a/chipflow/packaging/pins.py
+++ b/chipflow/packaging/pins.py
@@ -10,7 +10,7 @@
 from enum import StrEnum, auto
 from typing import Set, List, Union, Optional, TypeVar, Generic
 
-from ..config_models import Voltage, VoltageRange
+from ..config import Voltage, VoltageRange
 
 
 # Type aliases for pin collections
diff --git a/chipflow/packaging/utils.py b/chipflow/packaging/utils.py
index 0630a1ad..68a30847 100644
--- a/chipflow/packaging/utils.py
+++ b/chipflow/packaging/utils.py
@@ -60,7 +60,7 @@ def lock_pins(config: Optional['Config'] = None) -> None:
         ChipFlowError: If configuration is invalid or pin allocation fails
     """
     # Import here to avoid circular dependency
-    from ..platforms._packages import PACKAGE_DEFINITIONS
+    from ..packages import PACKAGE_DEFINITIONS
     from ..utils import top_components
 
     if config is None:
diff --git a/chipflow/platform/sim_step.py b/chipflow/platform/sim_step.py
index 7b338d66..3c3b1641 100644
--- a/chipflow/platform/sim_step.py
+++ b/chipflow/platform/sim_step.py
@@ -158,7 +158,7 @@ def check(self, *args):
 
         self.run(args)
         # Import here to avoid circular import
-        from ..steps._json_compare import compare_events
+        from ..common._json_compare import compare_events
         compare_events(self._config.chipflow.test.event_reference, self.sim_dir / "events.json")
         print("Integration test passed sucessfully")
 
diff --git a/chipflow/platforms/.__init__.py.swp b/chipflow/platforms/.__init__.py.swp
deleted file mode 100644
index 1cf8293d..00000000
Binary files a/chipflow/platforms/.__init__.py.swp and /dev/null differ
diff --git a/chipflow/platforms/__init__.py b/chipflow/platforms/__init__.py
deleted file mode 100644
index a4e77bd3..00000000
--- a/chipflow/platforms/__init__.py
+++ /dev/null
@@ -1,66 +0,0 @@
-"""
-Backward compatibility shim for platforms module.
-
-This module re-exports platform functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-
-Platform definitions
---------------------
-
-This module defines the functionality you use in your code to target the ChipFlow platform
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform import (  # noqa: F401
-    SiliconPlatformPort,
-    SiliconPlatform,
-    SimPlatform,
-    SoftwarePlatform,
-    IO_ANNOTATION_SCHEMA,
-    IOSignature,
-    IOModel,
-    IOTripPoint,
-    IOModelOptions,
-    OutputIOSignature,
-    InputIOSignature,
-    BidirIOSignature,
-    JTAGSignature,
-    SPISignature,
-    I2CSignature,
-    UARTSignature,
-    GPIOSignature,
-    QSPIFlashSignature,
-    attach_data,
-    SoftwareDriverSignature,
-    SoftwareBuild,
-    Sky130DriveMode,
-)
-
-# Package definitions still live in platforms._packages
-from ._packages import PACKAGE_DEFINITIONS  # noqa: F401
-
-__all__ = [
-    'IO_ANNOTATION_SCHEMA',
-    'IOSignature',
-    'IOModel',
-    'IOModelOptions',
-    'IOTripPoint',
-    'OutputIOSignature',
-    'InputIOSignature',
-    'BidirIOSignature',
-    'SiliconPlatformPort',
-    'SiliconPlatform',
-    'SimPlatform',
-    'SoftwarePlatform',
-    'JTAGSignature',
-    'SPISignature',
-    'I2CSignature',
-    'UARTSignature',
-    'GPIOSignature',
-    'QSPIFlashSignature',
-    'attach_data',
-    'SoftwareDriverSignature',
-    'SoftwareBuild',
-    'Sky130DriveMode',
-    'PACKAGE_DEFINITIONS',
-]
diff --git a/chipflow/platforms/silicon.py b/chipflow/platforms/silicon.py
deleted file mode 100644
index cad0da5a..00000000
--- a/chipflow/platforms/silicon.py
+++ /dev/null
@@ -1,25 +0,0 @@
-"""
-Backward compatibility shim for platforms.silicon module.
-
-This module re-exports silicon platform functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform.silicon import (  # noqa: F401
-    SiliconPlatform,
-    SiliconPlatformPort,
-    Sky130Port,
-    port_for_process,
-    IOBuffer,
-    FFBuffer,
-)
-
-__all__ = [
-    'SiliconPlatform',
-    'SiliconPlatformPort',
-    'Sky130Port',
-    'port_for_process',
-    'IOBuffer',
-    'FFBuffer',
-]
diff --git a/chipflow/steps/__init__.py b/chipflow/steps/__init__.py
deleted file mode 100644
index 1561f044..00000000
--- a/chipflow/steps/__init__.py
+++ /dev/null
@@ -1,30 +0,0 @@
-"""
-Backward compatibility shim for steps module.
-
-This module re-exports step functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-
-Steps provide an extensible way to modify the `chipflow` command behavior for a given design
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform import (  # noqa: F401
-    StepBase,
-    setup_amaranth_tools,
-    SiliconStep,
-    SimStep,
-    SoftwareStep,
-    BoardStep,
-)
-
-from ..platform import IOSignature  # noqa: F401
-
-__all__ = [
-    'StepBase',
-    'setup_amaranth_tools',
-    'SiliconStep',
-    'SimStep',
-    'SoftwareStep',
-    'BoardStep',
-    'IOSignature',
-]
diff --git a/chipflow/steps/board.py b/chipflow/steps/board.py
deleted file mode 100644
index e3f4f18a..00000000
--- a/chipflow/steps/board.py
+++ /dev/null
@@ -1,15 +0,0 @@
-"""
-Backward compatibility shim for steps.board module.
-
-This module re-exports board step functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform import (  # noqa: F401
-    BoardStep,
-)
-
-__all__ = [
-    'BoardStep',
-]
diff --git a/chipflow/steps/silicon.py b/chipflow/steps/silicon.py
deleted file mode 100644
index f895c0a2..00000000
--- a/chipflow/steps/silicon.py
+++ /dev/null
@@ -1,23 +0,0 @@
-"""
-Backward compatibility shim for steps.silicon module.
-
-This module re-exports silicon step functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform import (  # noqa: F401
-    SiliconStep,
-)
-from ..platform.silicon import SiliconPlatform  # noqa: F401
-from ..utils import top_components  # noqa: F401
-
-# Re-export dotenv for mocking in tests
-import dotenv  # noqa: F401
-
-__all__ = [
-    'SiliconStep',
-    'SiliconPlatform',
-    'top_components',
-    'dotenv',
-]
diff --git a/chipflow/steps/sim.py b/chipflow/steps/sim.py
deleted file mode 100644
index 4ab504eb..00000000
--- a/chipflow/steps/sim.py
+++ /dev/null
@@ -1,17 +0,0 @@
-"""
-Backward compatibility shim for steps.sim module.
-
-This module re-exports sim step functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform import (  # noqa: F401
-    SimStep,
-)
-from ..platform.sim import SimPlatform  # noqa: F401
-
-__all__ = [
-    'SimStep',
-    'SimPlatform',
-]
diff --git a/chipflow/steps/software.py b/chipflow/steps/software.py
deleted file mode 100644
index 28d8e290..00000000
--- a/chipflow/steps/software.py
+++ /dev/null
@@ -1,17 +0,0 @@
-"""
-Backward compatibility shim for steps.software module.
-
-This module re-exports software step functionality from the platform module.
-New code should import directly from chipflow.platform instead.
-"""
-
-# Re-export from platform module for backward compatibility
-from ..platform import (  # noqa: F401
-    SoftwareStep,
-)
-from ..platform.software import SoftwarePlatform  # noqa: F401
-
-__all__ = [
-    'SoftwareStep',
-    'SoftwarePlatform',
-]
diff --git a/chipflow_lib/platforms/__init__.py b/chipflow_lib/platforms/__init__.py
index 7f9630a5..994cc20f 100644
--- a/chipflow_lib/platforms/__init__.py
+++ b/chipflow_lib/platforms/__init__.py
@@ -2,7 +2,7 @@
 """
 Backward compatibility module for chipflow_lib.platforms.
 
-This module has been renamed to 'chipflow.platforms'. This compatibility layer
+This module has been renamed to 'chipflow.platform'. This compatibility layer
 will be maintained for some time but is deprecated. Please update your imports.
 """
 
@@ -10,15 +10,15 @@
 
 # Issue deprecation warning
 warnings.warn(
-    "The 'chipflow_lib.platforms' module has been renamed to 'chipflow.platforms'. "
-    "Please update your imports to use 'chipflow.platforms' instead. "
+    "The 'chipflow_lib.platforms' module has been renamed to 'chipflow.platform'. "
+    "Please update your imports to use 'chipflow.platform' instead. "
     "This compatibility shim will be removed in a future version.",
     DeprecationWarning,
     stacklevel=2
 )
 
 # Re-export symbols used by chipflow-digital-ip and chipflow-examples
-from chipflow.platforms import (  # noqa: F401, E402
+from chipflow.platform import (  # noqa: F401, E402
     # Pin signatures (used by both repos)
     BidirIOSignature,
     GPIOSignature,
@@ -40,3 +40,6 @@
     attach_data,
     SoftwareBuild,
 )
+
+# Package definitions
+from chipflow.packages import PACKAGE_DEFINITIONS  # noqa: F401, E402
diff --git a/chipflow_lib/steps/__init__.py b/chipflow_lib/steps/__init__.py
index 82518cb5..79b099a2 100644
--- a/chipflow_lib/steps/__init__.py
+++ b/chipflow_lib/steps/__init__.py
@@ -2,7 +2,7 @@
 """
 Backward compatibility module for chipflow_lib.steps.
 
-This module has been renamed to 'chipflow.steps'. This compatibility layer
+This module has been renamed to 'chipflow.platform'. This compatibility layer
 will be maintained for some time but is deprecated. Please update your imports.
 """
 
diff --git a/chipflow_lib/steps/board.py b/chipflow_lib/steps/board.py
index 8d0382c6..4d2757f7 100644
--- a/chipflow_lib/steps/board.py
+++ b/chipflow_lib/steps/board.py
@@ -2,7 +2,7 @@
 """
 Backward compatibility module for chipflow_lib.steps.board.
 
-This module has been renamed to 'chipflow.steps.board'. This compatibility layer
+This module has been renamed to 'chipflow.platform'. This compatibility layer
 will be maintained for some time but is deprecated. Please update your imports.
 """
 
@@ -10,12 +10,12 @@
 
 # Issue deprecation warning
 warnings.warn(
-    "The 'chipflow_lib.steps.board' module has been renamed to 'chipflow.steps.board'. "
-    "Please update your imports to use 'chipflow.steps.board' instead. "
+    "The 'chipflow_lib.steps.board' module has been renamed to 'chipflow.platform'. "
+    "Please update your imports to use 'chipflow.platform.BoardStep' instead. "
     "This compatibility shim will be removed in a future version.",
     DeprecationWarning,
     stacklevel=2
 )
 
 # Re-export BoardStep (used by chipflow-examples)
-from chipflow.steps.board import BoardStep  # noqa: F401, E402
+from chipflow.platform import BoardStep  # noqa: F401, E402
diff --git a/chipflow_lib/steps/sim.py b/chipflow_lib/steps/sim.py
index 85a4fdec..73e7d76f 100644
--- a/chipflow_lib/steps/sim.py
+++ b/chipflow_lib/steps/sim.py
@@ -2,7 +2,7 @@
 """
 Backward compatibility module for chipflow_lib.steps.sim.
 
-This module has been renamed to 'chipflow.steps.sim'. This compatibility layer
+This module has been renamed to 'chipflow.platform'. This compatibility layer
 will be maintained for some time but is deprecated. Please update your imports.
 """
 
@@ -10,12 +10,12 @@
 
 # Issue deprecation warning
 warnings.warn(
-    "The 'chipflow_lib.steps.sim' module has been renamed to 'chipflow.steps.sim'. "
-    "Please update your imports to use 'chipflow.steps.sim' instead. "
+    "The 'chipflow_lib.steps.sim' module has been renamed to 'chipflow.platform'. "
+    "Please update your imports to use 'chipflow.platform.SimStep' instead. "
     "This compatibility shim will be removed in a future version.",
     DeprecationWarning,
     stacklevel=2
 )
 
 # Re-export SimStep (used by chipflow-examples)
-from chipflow.steps.sim import SimStep  # noqa: F401, E402
+from chipflow.platform import SimStep  # noqa: F401, E402
diff --git a/chipflow_lib/steps/software.py b/chipflow_lib/steps/software.py
index 23f3fb58..45a3b338 100644
--- a/chipflow_lib/steps/software.py
+++ b/chipflow_lib/steps/software.py
@@ -2,7 +2,7 @@
 """
 Backward compatibility module for chipflow_lib.steps.software.
 
-This module has been renamed to 'chipflow.steps.software'. This compatibility layer
+This module has been renamed to 'chipflow.platform'. This compatibility layer
 will be maintained for some time but is deprecated. Please update your imports.
 """
 
@@ -10,12 +10,12 @@
 
 # Issue deprecation warning
 warnings.warn(
-    "The 'chipflow_lib.steps.software' module has been renamed to 'chipflow.steps.software'. "
-    "Please update your imports to use 'chipflow.steps.software' instead. "
+    "The 'chipflow_lib.steps.software' module has been renamed to 'chipflow.platform'. "
+    "Please update your imports to use 'chipflow.platform.SoftwareStep' instead. "
     "This compatibility shim will be removed in a future version.",
     DeprecationWarning,
     stacklevel=2
 )
 
 # Re-export SoftwareStep (used by chipflow-examples)
-from chipflow.steps.software import SoftwareStep  # noqa: F401, E402
+from chipflow.platform import SoftwareStep  # noqa: F401, E402
diff --git a/docs/conf.py b/docs/conf.py
index 3a7338b0..722a36b5 100644
--- a/docs/conf.py
+++ b/docs/conf.py
@@ -33,7 +33,7 @@
     'sphinx.ext.duration',
     'sphinx.ext.intersphinx',
     'sphinx.ext.napoleon',
-    # 'autoapi.extension',  # Temporarily disabled due to CI import issues
+    'autoapi.extension',
     'sphinxcontrib.autoprogram',
     'sphinxcontrib.autodoc_pydantic',
     'sphinx_design',
@@ -55,33 +55,22 @@
 
 autodoc_typehints = 'description'
 
-# AutoAPI configuration - temporarily disabled due to CI import issues
-#
-# AutoAPI is encountering "Unable to read file" errors for ALL Python modules
-# in the CI environment, preventing it from generating any API documentation.
-# This appears to be related to import-time issues during the refactoring work.
-#
-# Root cause investigation needed:
-# - Possible circular imports preventing module loading
-# - Import-time side effects that fail in CI but not locally
-# - Python path or module resolution differences in CI
-#
-# Workaround: Using manual sphinx.ext.autodoc directives in platform-api.rst
-# TODO: Re-enable AutoAPI once import issues are resolved
-#
-# autoapi_dirs = [
-#         "../chipflow",
-#         ]
-# autoapi_generate_api_docs = False
-# autoapi_template_dir = "_templates/autoapi"
-# # autoapi_verbose_visibility = 2
-# autoapi_keep_files = True
-# autoapi_options = [
-#     'members',
-#     'show-inheritance',
-#     'show-module-summary',
-#     'imported-members',
-# ]
+# AutoAPI configuration
+autoapi_dirs = ["../chipflow"]
+autoapi_generate_api_docs = True
+autoapi_template_dir = "_templates/autoapi"
+autoapi_keep_files = True
+autoapi_options = [
+    'members',
+    'show-inheritance',
+    'show-module-summary',
+    'imported-members',
+]
+autoapi_root = "chipflow-lib/autoapi"
+autoapi_add_toctree_entry = False  # Don't auto-add to toctree (we link manually)
+autoapi_ignore = [
+    "*/chipflow_lib/*",  # Backward compatibility shim
+]
 
 # Exclude in-progress stuff and template files
 exclude_patterns = [
@@ -137,7 +126,7 @@
 from amaranth.lib import wiring
 from amaranth.lib.wiring import In, Out, connect, flipped
 from amaranth_soc import csr, wishbone
-from chipflow.platforms import (
+from chipflow.platform import (
     UARTSignature, GPIOSignature, SPISignature, I2CSignature,
     QSPIFlashSignature, JTAGSignature,
     IOTripPoint, Sky130DriveMode,
@@ -155,5 +144,15 @@
 .. |optional| replace:: :bdg-secondary-line:`Optional`
 """
 
+# Suppress warnings from autoapi-generated docs due to re-exports
+# - ref.python: "more than one target found for cross-reference" (re-exported symbols)
+# - toc.not_readable: documents not in toctree (autoapi index pages we don't link directly)
+# - autodoc.duplicate_object: duplicate object descriptions (re-exports)
+suppress_warnings = [
+    "ref.python",
+    "toc.not_readable",
+    "autodoc.duplicate_object",
+]
+
 # -- Options for EPUB output
 epub_show_urls = 'footnote'
diff --git a/docs/contributor-pin-signature-internals.rst b/docs/contributor-pin-signature-internals.rst
index bbc417cb..0273cd43 100644
--- a/docs/contributor-pin-signature-internals.rst
+++ b/docs/contributor-pin-signature-internals.rst
@@ -326,7 +326,7 @@ This signature wrapper attaches driver files to peripherals:
 
 .. code-block:: python
 
-    from chipflow.platforms import UARTSignature, SoftwareDriverSignature
+    from chipflow.platform import UARTSignature, SoftwareDriverSignature
     from amaranth_soc import csr
 
     class UARTPeripheral(wiring.Component):
@@ -561,7 +561,7 @@ Step 1: Define a Peripheral with Driver
 .. code-block:: python
 
     # chipflow_digital_ip/io/_uart.py
-    from chipflow.platforms import UARTSignature, SoftwareDriverSignature
+    from chipflow.platform import UARTSignature, SoftwareDriverSignature
 
     class UARTPeripheral(wiring.Component):
         def __init__(self, *, init_divisor=0):
diff --git a/docs/platform-api.rst b/docs/platform-api.rst
index 4bf1d4e1..de404f26 100644
--- a/docs/platform-api.rst
+++ b/docs/platform-api.rst
@@ -1,167 +1,59 @@
 Platform API Reference
 ======================
 
-This page documents the complete public API of the ``chipflow.platform`` module.
+This page provides the API reference for the ``chipflow.platform`` module.
 
 All symbols listed here are re-exported from submodules for convenience and can be imported directly from ``chipflow.platform``.
 
-Platforms
----------
+.. note::
 
-.. autoclass:: chipflow.platform.sim.SimPlatform
-   :members:
-   :undoc-members:
-   :show-inheritance:
+   For detailed auto-generated API documentation, see the full API reference linked below.
 
-.. autoclass:: chipflow.platform.silicon.SiliconPlatform
-   :members:
-   :undoc-members:
-   :show-inheritance:
+.. toctree::
+   :maxdepth: 2
+   :caption: API Reference
 
-.. autoclass:: chipflow.platform.silicon.SiliconPlatformPort
-   :members:
-   :undoc-members:
-   :show-inheritance:
+   /chipflow-lib/autoapi/chipflow/index
 
-.. autoclass:: chipflow.platform.software.SoftwarePlatform
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-Build Steps
+Quick Links
 -----------
 
-.. autoclass:: chipflow.platform.base.StepBase
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.sim_step.SimStep
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.silicon_step.SiliconStep
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.software_step.SoftwareStep
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.board_step.BoardStep
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-IO Signatures
--------------
-
-Base IO Signatures
-~~~~~~~~~~~~~~~~~~
-
-.. autoclass:: chipflow.platform.io.iosignature.IOSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.iosignature.OutputIOSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.iosignature.InputIOSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.iosignature.BidirIOSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-Protocol-Specific Signatures
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-.. autoclass:: chipflow.platform.io.signatures.UARTSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.signatures.GPIOSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.signatures.SPISignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.signatures.I2CSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.signatures.QSPIFlashSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.signatures.JTAGSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-Software Integration
-~~~~~~~~~~~~~~~~~~~~
-
-.. autoclass:: chipflow.platform.io.signatures.SoftwareDriverSignature
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autoclass:: chipflow.platform.io.signatures.SoftwareBuild
-   :members:
-   :undoc-members:
-   :show-inheritance:
-
-.. autofunction:: chipflow.platform.io.signatures.attach_data
+**Platforms:**
 
-IO Configuration
-----------------
-
-.. autoclass:: chipflow.platform.io.iosignature.IOModel
-   :members:
-   :undoc-members:
-
-.. autoclass:: chipflow.platform.io.iosignature.IOModelOptions
-   :members:
-   :undoc-members:
+- :py:class:`chipflow.platform.SimPlatform` - Simulation platform
+- :py:class:`chipflow.platform.SiliconPlatform` - Silicon/ASIC platform
+- :py:class:`chipflow.platform.SoftwarePlatform` - Software build platform
 
-.. autoclass:: chipflow.platform.io.iosignature.IOTripPoint
-   :members:
-   :undoc-members:
-   :show-inheritance:
+**Build Steps:**
 
-.. autoclass:: chipflow.platform.io.sky130.Sky130DriveMode
-   :members:
-   :undoc-members:
-   :show-inheritance:
+- :py:class:`chipflow.platform.StepBase` - Base class for build steps
+- :py:class:`chipflow.platform.SimStep` - Simulation step
+- :py:class:`chipflow.platform.SiliconStep` - Silicon build step
+- :py:class:`chipflow.platform.SoftwareStep` - Software build step
+- :py:class:`chipflow.platform.BoardStep` - Board programming step
 
-Utility Functions
------------------
+**IO Signatures:**
 
-.. autofunction:: chipflow.platform.base.setup_amaranth_tools
+- :py:class:`chipflow.platform.IOSignature` - Base IO signature class
+- :py:class:`chipflow.platform.OutputIOSignature` - Output-only signature
+- :py:class:`chipflow.platform.InputIOSignature` - Input-only signature
+- :py:class:`chipflow.platform.BidirIOSignature` - Bidirectional signature
+- :py:class:`chipflow.platform.UARTSignature` - UART interface signature
+- :py:class:`chipflow.platform.GPIOSignature` - GPIO interface signature
+- :py:class:`chipflow.platform.SPISignature` - SPI interface signature
+- :py:class:`chipflow.platform.I2CSignature` - I2C interface signature
+- :py:class:`chipflow.platform.QSPIFlashSignature` - QSPI Flash signature
+- :py:class:`chipflow.platform.JTAGSignature` - JTAG interface signature
 
-.. autofunction:: chipflow.utils.top_components
+**Software Integration:**
 
-.. autofunction:: chipflow.utils.get_software_builds
+- :py:class:`chipflow.platform.SoftwareDriverSignature` - Signature with driver code
+- :py:class:`chipflow.platform.SoftwareBuild` - Software build configuration
+- :py:func:`chipflow.platform.attach_data` - Attach software to flash memory
 
-Constants
----------
+**IO Configuration:**
 
-.. autodata:: chipflow.platform.io.iosignature.IO_ANNOTATION_SCHEMA
-   :annotation:
+- :py:class:`chipflow.platform.IOModel` - IO model data
+- :py:class:`chipflow.platform.IOModelOptions` - IO model options
+- :py:class:`chipflow.platform.IOTripPoint` - Input buffer trip point
+- :py:class:`chipflow.platform.Sky130DriveMode` - Sky130 drive mode configuration
diff --git a/docs/simulation-guide.rst b/docs/simulation-guide.rst
index bd5676dc..76dd0785 100644
--- a/docs/simulation-guide.rst
+++ b/docs/simulation-guide.rst
@@ -505,7 +505,7 @@ Design (design/design.py)
 
     from chipflow_digital_ip.io import UARTPeripheral, GPIOPeripheral
     from chipflow_digital_ip.memory import QSPIFlash
-    from chipflow.platforms import (
+    from chipflow.platform import (
         UARTSignature, GPIOSignature, QSPIFlashSignature,
         attach_data, SoftwareBuild
     )
diff --git a/docs/using-pin-signatures.rst b/docs/using-pin-signatures.rst
index d561af40..5b6a3562 100644
--- a/docs/using-pin-signatures.rst
+++ b/docs/using-pin-signatures.rst
@@ -67,7 +67,7 @@ All pin signatures accept ``IOModelOptions`` to configure the electrical and beh
 
 .. code-block:: python
 
-    from chipflow.platforms import GPIOSignature, IOTripPoint
+    from chipflow.platform import GPIOSignature, IOTripPoint
 
     super().__init__({
         # Basic GPIO
@@ -113,7 +113,7 @@ For Sky130 chips, you can configure the I/O cell drive mode:
 
 .. code-block:: python
 
-    from chipflow.platforms import Sky130DriveMode, GPIOSignature
+    from chipflow.platform import Sky130DriveMode, GPIOSignature
 
     # Use open-drain with strong pull-down for I2C
     super().__init__({
@@ -137,7 +137,7 @@ Here's how to create a peripheral that includes software driver code:
 
     from amaranth.lib.wiring import In, Out
     from amaranth_soc import csr
-    from chipflow.platforms import UARTSignature, SoftwareDriverSignature
+    from chipflow.platform import UARTSignature, SoftwareDriverSignature
 
     class UARTPeripheral(wiring.Component):
         def __init__(self, *, addr_width=5, data_width=8, init_divisor=0):
@@ -240,7 +240,7 @@ Here's a complete example of using peripherals with driver code in your top-leve
     from amaranth_soc import csr
 
     from chipflow_digital_ip.io import UARTPeripheral, GPIOPeripheral
-    from chipflow.platforms import UARTSignature, GPIOSignature
+    from chipflow.platform import UARTSignature, GPIOSignature
 
     class MySoC(wiring.Component):
         def __init__(self):
@@ -287,7 +287,7 @@ Basic Usage
 .. code-block:: python
 
     from pathlib import Path
-    from chipflow.platforms import attach_data, SoftwareBuild
+    from chipflow.platform import attach_data, SoftwareBuild
 
     def elaborate(self, platform):
         m = Module()
@@ -340,7 +340,7 @@ Here's a complete working example combining all concepts:
 
     from chipflow_digital_ip.io import UARTPeripheral, GPIOPeripheral
     from chipflow_digital_ip.memory import QSPIFlash
-    from chipflow.platforms import (
+    from chipflow.platform import (
         UARTSignature, GPIOSignature, QSPIFlashSignature,
         Sky130DriveMode, attach_data, SoftwareBuild
     )
diff --git a/pdm.lock b/pdm.lock
index 0e14bb08..7f9edd05 100644
--- a/pdm.lock
+++ b/pdm.lock
@@ -5,10 +5,10 @@
 groups = ["default", "dev"]
 strategy = ["inherit_metadata"]
 lock_version = "4.5.0"
-content_hash = "sha256:177489a4de81171e46607258cf0a63c85875fadf70d820c9701eb3a4056465db"
+content_hash = "sha256:9bb1c68b824dbff4e6a18c37cbb1b9b9fe10cafabbe5a71d0178af21f1503c50"
 
 [[metadata.targets]]
-requires_python = ">=3.11,<3.14"
+requires_python = ">=3.12,<3.14"
 
 [[package]]
 name = "accessible-pygments"
@@ -136,16 +136,17 @@ files = [
 
 [[package]]
 name = "astroid"
-version = "3.3.11"
-requires_python = ">=3.9.0"
+version = "4.0.2"
+requires_python = ">=3.10.0"
 summary = "An abstract syntax tree for Python with inference support."
 groups = ["dev"]
+marker = "python_version >= \"3.12\""
 dependencies = [
     "typing-extensions>=4; python_version < \"3.11\"",
 ]
 files = [
-    {file = "astroid-3.3.11-py3-none-any.whl", hash = "sha256:54c760ae8322ece1abd213057c4b5bba7c49818853fc901ef09719a60dbf9dec"},
-    {file = "astroid-3.3.11.tar.gz", hash = "sha256:1e5a5011af2920c7c67a53f65d536d65bfa7116feeaf2354d8b94f29573bb0ce"},
+    {file = "astroid-4.0.2-py3-none-any.whl", hash = "sha256:d7546c00a12efc32650b19a2bb66a153883185d3179ab0d4868086f807338b9b"},
+    {file = "astroid-4.0.2.tar.gz", hash = "sha256:ac8fb7ca1c08eb9afec91ccc23edbd8ac73bb22cbdd7da1d488d9fb8d6579070"},
 ]
 
 [[package]]
@@ -1243,21 +1244,21 @@ files = [
 
 [[package]]
 name = "sphinx-autoapi"
-version = "3.6.0"
+version = "3.6.1"
 requires_python = ">=3.9"
 summary = "Sphinx API documentation generator"
 groups = ["dev"]
 dependencies = [
     "Jinja2",
     "PyYAML",
-    "astroid>=2.7; python_version < \"3.12\"",
-    "astroid>=3; python_version >= \"3.12\"",
+    "astroid~=3.0; python_version < \"3.12\"",
+    "astroid~=4.0; python_version >= \"3.12\"",
     "sphinx>=7.4.0",
     "stdlib-list; python_version < \"3.10\"",
 ]
 files = [
-    {file = "sphinx_autoapi-3.6.0-py3-none-any.whl", hash = "sha256:f3b66714493cab140b0e896d33ce7137654a16ac1edb6563edcbd47bf975f711"},
-    {file = "sphinx_autoapi-3.6.0.tar.gz", hash = "sha256:c685f274e41d0842ae7e199460c322c4bd7fec816ccc2da8d806094b4f64af06"},
+    {file = "sphinx_autoapi-3.6.1-py3-none-any.whl", hash = "sha256:6b7af0d5650f6eac1f4b85c1eb9f9a4911160ec7138bdc4451c77a5e94d5832c"},
+    {file = "sphinx_autoapi-3.6.1.tar.gz", hash = "sha256:1ff2992b7d5e39ccf92413098a376e0f91e7b4ca532c4f3e71298dbc8a4a9900"},
 ]
 
 [[package]]
diff --git a/pyproject.toml b/pyproject.toml
index d54fc84f..7c2642e3 100644
--- a/pyproject.toml
+++ b/pyproject.toml
@@ -13,7 +13,7 @@ authors = [
 ]
 license = {file = "LICENSE.md"}
 
-requires-python = ">=3.11,<3.14"
+requires-python = ">=3.12,<3.14"
 dependencies = [
     "amaranth[builtin-yosys]>=0.5,<0.7",
     "amaranth-soc @ git+https://github.com/amaranth-lang/amaranth-soc",
@@ -79,7 +79,7 @@ dev = [
     "ruff>=0.9.2",
     "pytest>=7.2.0",
     "pytest-cov>=6.0.0",
-    "sphinx-autoapi>=3.5.0",
+    "sphinx-autoapi>=3.6.1",
     "sphinx~=7.4.7",
     "furo>=2024.04.27",
     "tomli-w>=1.2.0",
diff --git a/tests/fixtures/mock_top.py b/tests/fixtures/mock_top.py
index f157881f..6cb9e7d4 100644
--- a/tests/fixtures/mock_top.py
+++ b/tests/fixtures/mock_top.py
@@ -3,7 +3,7 @@
 from amaranth.lib import wiring
 from amaranth.lib.wiring import In, Out
 
-from chipflow.platforms import InputIOSignature, OutputIOSignature, BidirIOSignature
+from chipflow.platform import InputIOSignature, OutputIOSignature, BidirIOSignature
 
 __all__ = ["MockTop"]
 
diff --git a/tests/test_cli.py b/tests/test_cli.py
index 3bf00ffb..815e8856 100644
--- a/tests/test_cli.py
+++ b/tests/test_cli.py
@@ -9,7 +9,7 @@
 
 from chipflow import ChipFlowError
 from chipflow.cli import run
-from chipflow.config_models import Config, ChipFlowConfig
+from chipflow.config import Config, ChipFlowConfig
 
 class MockCommand:
     """Mock command for testing CLI"""
diff --git a/tests/test_init.py b/tests/test_init.py
index f3cfae3d..db84e023 100644
--- a/tests/test_init.py
+++ b/tests/test_init.py
@@ -13,7 +13,7 @@
     _parse_config)
 
 from chipflow.config.parser import _parse_config_file
-from chipflow.config_models import Config, ChipFlowConfig
+from chipflow.config import Config, ChipFlowConfig
 # Process is not part of the public API, so we won't test it here
 
 
diff --git a/tests/test_package_pins.py b/tests/test_package_pins.py
index 4ff5c8e0..b8b727fe 100644
--- a/tests/test_package_pins.py
+++ b/tests/test_package_pins.py
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-2-Clause
 import unittest
 
-from chipflow.platforms import PACKAGE_DEFINITIONS
+from chipflow.packages import PACKAGE_DEFINITIONS
 
 
 class TestPackageDefinitions(unittest.TestCase):
diff --git a/tests/test_pin_lock.py b/tests/test_pin_lock.py
index a070ef17..1622c56a 100644
--- a/tests/test_pin_lock.py
+++ b/tests/test_pin_lock.py
@@ -5,7 +5,7 @@
 import unittest
 from pathlib import Path
 
-from chipflow.platforms import PACKAGE_DEFINITIONS
+from chipflow.packages import PACKAGE_DEFINITIONS
 from chipflow.packaging import load_pinlock
 from chipflow.packaging.lockfile import LockFile
 from chipflow import ChipFlowError
diff --git a/tests/test_silicon_platform_port.py b/tests/test_silicon_platform_port.py
index 0eb503cb..24c0026c 100644
--- a/tests/test_silicon_platform_port.py
+++ b/tests/test_silicon_platform_port.py
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-2-Clause
 import unittest
 
-from chipflow.platforms.silicon import SiliconPlatformPort
+from chipflow.platform import SiliconPlatformPort
 
 
 class TestSiliconPlatformPort(unittest.TestCase):
diff --git a/tests/test_utils.py b/tests/test_utils.py
index 88aead85..73bb505c 100644
--- a/tests/test_utils.py
+++ b/tests/test_utils.py
@@ -5,7 +5,7 @@
 from amaranth import Const
 from amaranth.lib import io
 
-from chipflow.platforms import IOSignature, OutputIOSignature, InputIOSignature, BidirIOSignature
+from chipflow.platform import IOSignature, OutputIOSignature, InputIOSignature, BidirIOSignature
 
 
 logger = logging.getLogger(__name__)
diff --git a/tests/test_utils_additional.py b/tests/test_utils_additional.py
index a9404036..055f3e6d 100644
--- a/tests/test_utils_additional.py
+++ b/tests/test_utils_additional.py
@@ -3,11 +3,8 @@
 
 from amaranth.lib import io
 
-from chipflow.platforms import (
-    IOSignature,
-    IOModel,
-    PACKAGE_DEFINITIONS
-)
+from chipflow.platform import IOSignature, IOModel
+from chipflow.packages import PACKAGE_DEFINITIONS
 
 
 class TestIOSignature(unittest.TestCase):