critical warnings

[synaption]

Hello. Please and thank you in advance. I am trying to get this project working on my shiny new zybo, and I'm having trouble right out of the gate. Vivado is telling me that I'm missing a lot of IP it sounds like. I'm using version 2018.2 here is my tcl console output if anybody feels inclined to help me.

start_gui
open_project C:/Users/butt/Downloads/Hackster-master/Hackster-master/Sobel_zybo_z7/block_compile.xpr
open_project C:/Users/butt/Downloads/Hackster-master/Hackster-master/Sobel_zybo_z7/block_compile.xpr
Scanning sources...
Finished scanning sources
WARNING: [filemgmt 56-3] IP Repository Path: Could not find the directory 'C:/Users/butt/Downloads/Hackster-master/Hackster-master/digilent'.
WARNING: [filemgmt 56-3] IP Repository Path: Could not find the directory 'C:/Users/butt/Downloads/Hackster-master/Hackster-master/hls_lib'.
INFO: [IP_Flow 19-234] Refreshing IP repositories
WARNING: [IP_Flow 19-2248] Failed to load user IP repository 'c:/Users/butt/Downloads/Hackster-master/Hackster-master/digilent'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
WARNING: [IP_Flow 19-2248] Failed to load user IP repository 'c:/Users/butt/Downloads/Hackster-master/Hackster-master/hls_lib'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2018.2/data/ip'.
WARNING: [BD 41-1661] One or more IPs have been locked in the design 'design_1.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
design_1_dvi2rgb_1_1
design_1_v_vid_in_axi4s_0_0
design_1_axi_vdma_0_0
design_1_xbar_1
design_1_v_axi4s_vid_out_0_0
design_1_ps7_0_axi_periph_0
design_1_rgb2dvi_0_1
design_1_ila_0_0
design_1_xlconstant_0_0
design_1_xlconstant_0_1
design_1_xbar_0
design_1_axi_dynclk_0_0
design_1_axi_gpio_0_0
design_1_ila_1_0
design_1_ila_3_0
design_1_axis_subset_converter_0_0
design_1_axi_interconnect_0_0
design_1_axis_subset_converter_0_1
design_1_ila_4_0
design_1_ila_1_1
design_1_ila_5_0
design_1_auto_pc_1
design_1_auto_pc_0
design_1_image_filter_0_1

open_project: Time (s): cpu = 00:00:42 ; elapsed = 00:00:37 . Memory (MB): peak = 1025.367 ; gain = 309.395
update_compile_order -fileset sources_1
open_bd_design {C:/Users/butt/Downloads/Hackster-master/Hackster-master/Sobel_zybo_z7/block_compile.srcs/sources_1/bd/design_1/design_1.bd}
Adding cell -- xilinx.com:ip:v_vid_in_axi4s:4.0 - v_vid_in_axi4s_0
Adding cell -- xilinx.com:ip:xlconstant:1.1 - xlconstant_0
Adding cell -- xilinx.com:ip:xlconstant:1.1 - xlconstant_1
Adding cell -- xilinx.com:ip:axi_vdma:6.3 - axi_vdma_0
Adding cell -- xilinx.com:ip:ila:6.2 - ila_0
Adding cell -- xilinx.com:ip:processing_system7:5.5 - processing_system7_0
Adding cell -- digilentinc.com:ip:rgb2dvi:1.4 - rgb2dvi_0
CRITICAL WARNING: [BD 41-51] Could not find bus definition for the interface: TMDS
CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: TMDS
CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: TMDS
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - rst_ps7_0_50M
Adding cell -- xilinx.com:ip:v_axi4s_vid_out:4.0 - v_axi4s_vid_out_0
Adding cell -- xilinx.com:ip:v_tc:6.1 - v_tc_0
Adding cell -- xilinx.com:ip:v_tc:6.1 - v_tc_1
Adding cell -- digilentinc.com:ip:axi_dynclk:1.0 - axi_dynclk_0
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_0
Adding cell -- xilinx.com:ip:ila:6.2 - ila_1
Adding cell -- digilentinc.com:ip:dvi2rgb:1.9 - dvi2rgb_1
CRITICAL WARNING: [BD 41-51] Could not find bus definition for the interface: TMDS
CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: TMDS
CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: TMDS
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_0
Adding cell -- xilinx.com:ip:ila:6.2 - ila_3
Adding cell -- xilinx.com:ip:ila:6.2 - ila_4
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_1
Adding cell -- xilinx.com:ip:ila:6.2 - ila_2
Adding cell -- xilinx.com:ip:ila:6.2 - ila_5
Adding cell -- adiuvoengineering:hls:image_filter:1.0 - image_filter_0
CRITICAL WARNING: [BD 41-52] Could not find the abstraction definition specified by the vlnv: digilentinc.com:interface:tmds_rtl:1.0
CRITICAL WARNING: [BD 41-181] Type specified by the VLNV: 'digilentinc.com:interface:tmds_rtl:1.0', cannot be found. Interface port: 'hdmi_in' cannot be created
CRITICAL WARNING: [BD 41-52] Could not find the abstraction definition specified by the vlnv: digilentinc.com:interface:tmds_rtl:1.0
CRITICAL WARNING: [BD 41-181] Type specified by the VLNV: 'digilentinc.com:interface:tmds_rtl:1.0', cannot be found. Interface port: 'hdmi_out' cannot be created
CRITICAL WARNING: [BD 41-52] Could not find the abstraction definition specified by the vlnv: digilentinc.com:interface:tmds_rtl:1.0
CRITICAL WARNING: [BD 41-181] Type specified by the VLNV: 'digilentinc.com:interface:tmds_rtl:1.0', cannot be found. Interface port: 'hdmi_in' cannot be created
CRITICAL WARNING: [BD 41-52] Could not find the abstraction definition specified by the vlnv: digilentinc.com:interface:tmds_rtl:1.0
CRITICAL WARNING: [BD 41-181] Type specified by the VLNV: 'digilentinc.com:interface:tmds_rtl:1.0', cannot be found. Interface port: 'hdmi_out' cannot be created
WARNING: [BD 41-1731] Type mismatch between connected pins: /processing_system7_0/FCLK_RESET0_N(rst) and /ila_0/probe1(undef)
WARNING: [BD 41-1731] Type mismatch between connected pins: /rst_ps7_0_50M/peripheral_aresetn(rst) and /ila_0/probe0(undef)
WARNING: [BD 41-1731] Type mismatch between connected pins: /axi_dynclk_0/PXL_CLK_O(clk) and /ila_4/probe0(undef)
Adding cell -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Successfully read diagram <design_1> from BD file <C:/Users/butt/Downloads/Hackster-master/Hackster-master/Sobel_zybo_z7/block_compile.srcs/sources_1/bd/design_1/design_1.bd>
open_bd_design: Time (s): cpu = 00:00:06 ; elapsed = 00:00:05 . Memory (MB): peak = 1307.746 ; gain = 46.816
update_ip_catalog -rebuild
INFO: [IP_Flow 19-234] Refreshing IP repositories
WARNING: [IP_Flow 19-2248] Failed to load user IP repository 'c:/Users/butt/Downloads/Hackster-master/Hackster-master/digilent'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
WARNING: [IP_Flow 19-2248] Failed to load user IP repository 'c:/Users/butt/Downloads/Hackster-master/Hackster-master/hls_lib'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.

[ATaylorCEngFIET]

Hi you need to run the report IP in vivado 2018.2 and then click on upgrade IP. You should also check you have the digilent IP libraries installed.

[synaption]

It took a lot of fiddling, but I figured out where to point to for all of the IP. Now I have been stuck for a while on how to do the sdk part. It seem like I have got my board to run the program, but it doesn't seem to be processing any video. My laptop recognizes a second monitor plugged in with the proper resolution. And the TV that I'm plugged into on the hdmi out seems to be detecting something. It keeps starting to turn on but then nothing happens.. I'm wondering if it might be that I am using my laptop instead of a camera as the source. Do you have any other ideas? Please and thank you.

[ATaylorCEngFIET]

That is an interesting issue, what resolution are you driving it with?

[synaption]

It's 1280x720. I have tried the same thing a few times and gotten different results.. Right at this moment it's doing nothing. Sometimes I get an error. And sometimes I have been able to get some non-moving lines on the screen.

[synaption]

I guess what I'm unclear on is exactly what code I should be running in the SDK

[synaption]

IDK if this helps. Now I am consistently able to get this error, and a few non moving horizontal lines on my screen in ubuntu xilinx sdk 2017.4. This is when using a clean install of this repo and opening straight into the SDK.

make: *** No rule to make target '/home/synaption/2017_E/design_1_wrapper_hw_platform_0/ps7_init.c', needed by 'src/ps7_init.o'. Stop.

[ATaylorCEngFIET]

Bob, just about to fly back from the USA, I will take a look tomorrow if that is OK? perhaps we could have a chat on Sykpe it might be faster

[synaption]

Thanks a bunch. I'll be flying to pycon za in south africa from chicago tomorrow! I was trying to get this working before I left, but I would certainly appreciate a chat if I can find some down time that works for both of us while I'm there. Unless there is some obvious direction you can point me in now, I'll know more about what my schedule is like when I land in 45 hours or so.

[synaption]

Hey Adam. Looks like my connection here is pretty unreliable. I'm free all day saturday and sunday via google hangouts or whatever if that works.

[ATaylorCEngFIET]

Bob so sorry I totally lost track of this, do you need help still?

[synaption]

Yes Please! I have not made any more progress since we last messaged each other. Though I have been hacking on this pretty neat framework https://github.com/Xilinx/FINN . I just got back in home yesterday, so any time you're free to talk works for me. Best, Bob McGrath

…

On Mon, Oct 15, 2018 at 3:24 PM Adam Taylor ***@***.***> wrote: Bob so sorry I totally lost track of this, do you need help still? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#1 (comment)>, or mute the thread <https://github.com/notifications/unsubscribe-auth/AbwxNB1Vp91NRmgbNNT5TLSSikN-0hTcks5ulO7mgaJpZM4Wb44Z> .

[osmanseker]

Dear Adam Taylor,

I am sorry that i'm posting on this message here but i have tried to contact u on hackster and commented on your project but i haven't recieved an answer from u. So i was trying new ways to contact you and this is my last resource.

I tried to message you about the Game of Life-Based Lighting project on hackster. The message was the following:

I have found your project through our professor who suggested looking into your project for the project we have to do for school. Your project is exactly what we need to complete our project but we can't find the source code on your github. If we copy your code that is published, we get a few errors which we can't quite seem to solve. Could you please sent us a link to your github where the source code is or send us the source code. (i need the declarations for the elements/functions you used)

Looking forward to hear from you.

Kind Regards,
Osman Seker
student electronics-ICT